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How to Use Dummy Switch in VLSI Design | CMOS Inverter Simulation in Cadence

YouTubeSuccess Point for VLSI

How to Use Dummy Switch in VLSI Design | CMOS Inverter Simulation in Cadence

In this video, I demonstrate how a dummy switch can be used to reduce charge injection and glitches at the output of a CMOS inverter circuit. Using Cadence Virtuoso, I first show the waveform of the inverter output without a dummy switch, where clear voltage spikes/glitches can be seen. Then I add a dummy NMOS transistor, explain its correct ...

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